sc14428 baseband processor for fp & pp dect and wdct ? 2004 national semiconductor corporation www.national.com advanced information march 2004 sc14428 baseband processor for fp & pp dect and wdct 1.0 general description .the sc14428 is a cmos ic optimized to handle all the audio, signal and data processing needed within a dect (1.9 ghz) or 2.4ghz ism di gital band base stations and handsets. a four channel adpcm transcoder, a very low power 16 bit codec and analog frontend ar e integrated. direct connec- tions towards pstn or isdn line interface are possible. the sc14428 has a programmable generic dsp opti- mized for telecom applications. the sc14428 is designed to fit to any radio interface. a dedicated tdma controller handles all physical layer slot formats and radio control. national semiconductor?s standard compactrisc tm cr16c microprocessor takes care of all the higher protocol stack. 2.0 features complies with dect ets 300 175-2,3 & 8 swap-ca v1.3 rev 1.3 20000616 1.8volt operating voltage with 2.65v (typ) io pads. two chip low drop voltage regulators 16 bit compactrisctm cr16c microprocessor with programmable clock speeds up to 20.736 mhz. four channel dma controller. serial debug interface, nexus class-1 compliant. 16kbyte shared, 6kbyte non shared ram 4kbyte shared ram for tam dsp versions with rom, flash and data flash programmable 16 bits system bus interface with bus master and slave operation. user programmable generic dsp with fixed telecom processing routines. four full duplex 32 kbit s/sec adpcm transcoder. on-chip dedicated instructio n processor (dip) for all tdma based events, which supports dct 1.152mhz, 0.576mhz and 0.288mhz data rates. ism band and dect with 9.216, 10.368 and 13.824 mhz xtals. protected and unprotected fu ll and double slot b-fields flexible 1.152 mbit/sec thre e wire interface to radio front synthesizer. one 16-bit linear codec selectable fast antenna diversity operation or rssi measurement with peak hold adc. three input general purpose 8 bit adc two general purpose timers and watch dog timer. two capture timers for frequency measurement for e.g. metering, ringing and call progress tone detection. three general purpose i/o po rts with two edge/level pro- grammable interrupts full duplex uart and microwire tm interface. spi tm interface (master/slave). flexible 8 khz synchronous serial interface to external codecs and isdn interface circuits. three programmable chip selects integrated opamp for caller-id (80 pin pfqp and 80,)128,160 pins tqfp packages. 3.0 system diagram compactrisc tm is a trademark of national semiconductor corporation sc14428 isdn or data interface pstn interface pstn interface sc14428 cid handsfree isdn pstn1 pstn2 sc14428 sc14428 sc14428 sc14428
www.national.com 2 (confidential) revision 1.0 lmx9820 3.0 system diagram (continued) figure 1. sc14428 block diagram timers 8 bit adc p2[7-0] scaler access bus2 p1[7-0] p0[7-0] pwm access bus1 uart dma system bus interface 16 bits 16 bits boot rom cr16c compactrisc 16 bit micro controller data ram shared ram 6kbyte 16kbyte dedicated instruction processor gendsp codec adpcm encryp tion rf control pins bmc 8 bit dac gaussian shaper clock recovery 3 bits fir filter micro wire temperature sensor headset 30w xtal trimming flash/ clock divider sclk rf interface afe micro code ram 1 kbyte dc/dc convertor battery & charge 2x voltage control regulator icu data irda 8 kbyte flash 1->5 pcm if pstn isdn, if codec sdi+ pll p3[7-1] mux spi rom
revision 1.0 (confidential) 3 sc14428 4.0 specifications all min/max specification limits ar e guaranteed by design, or product ion test, or statistical methods. table 1. absolute maximum ratings 1 1.absolute maximum ratings are those values that may be applied for maximum 50 hours. beyond these values, damage to the device may occur. parameter description conditions min max units vbat1_max max battery supply voltage vbat1 5.5 v vbat2_max max battery supply voltage vbat2 5.5 v ibat1_max max negative current into vbat1 300 ma ibat2_max max negative current into vbat2 300 ma ivddiotot_max max total current into vddios 90 ma ivddio_max max current through i/o pins 20 ma vdd_max max core supply voltage (vdd-vss / avd-avs / avd2-avs / vddrf-vssrf) 2.0 v vddiof_max max i/o supply voltage for devices with flash (vddio-vss) note 2 2.a voltage between 2.8v and 3.0v may applied for a ma ximum time of 1 hour in order to guarantee the de- vice specifications. 3.0 v vddio_max max i/o supply voltage for devices without flash (vddio-vss) note 3 3.a voltage between 3.3v and 3.6v may applied for a maximum time of 50 hours in order to guarantee the device specifications. 3.6 v vldo1_ctrl_max max voltage on pin ldo1_ctrl note 4 4.for ldo1_ctrl, ldo2_ctrl, with 5v input protec tion, vdd must be between 1.75v and 2.0v or vbat 1 >2.0v or vbat2>2.8v. vss-0.3 5.25 v vldo2_ctrl_max max voltage on pin ldo2_ctrl note 4 vss-0.3 5.25 v vpon_max max voltage on pin pon vss-0.3 2.85 v vcharge_max max voltage on pin charge vss-0.3 2.85 v vbat3_max max voltage on pin vbat3 vss-0.3 2.85 v vadc1_max max voltage on pin adc1 vss-0.3 2.85 v vrdidig_max max voltage on pin rdi digital mode (max 3.6v) vss-0.3 vddio+0.3 v vrdiana_max max voltage on pin rdi analog mode vss-0.3 2.0 v vdig_max max voltage on digital input pins (max 3.6v) vss-0.3 vddio+0.3 v vana_max max voltage on any other input (incl analog pads) vss-0.3 2.0 v iprot_max max current through prot. diodes on any pin to vddio 100 ma iprotcid_max max current through prot. diode pins cid+/- to agnd 1.0 ma iprotmic_max current through prot. diode pin mic+/- to agnd 2.4 ma iprotpon_max max current through prot. circuit of pon pin. note 5 0.6 ma iprotcharge_max max current through prot. circuit of charge pin. note 5 0.6 ma iprotvbat3_max max current through prot. circuit of vbat3 pin. note 5 0.6 ma iprotadc1_max max current through prot. circuit of adc1 pin. 0.6 ma tstorage storage temperature -65 +150 c ppackage package power dissipation @ 25 c 500 mw ilu latch-up current all pins according jedec 78 ta = 65 c 100 ma ilu_rdi_25 latch-up current rdi pin ta = 25 c 100 ma ilu_rdi_60 latch-up current rdi pin ta = 65 c 50 ma vesd_mm esd voltage according to man machine model 100 v vesd_hbm esd voltage according to human body model 1000 v
www.national.com 4 (confidential) revision 1.0 lmx9820 4.0 specifications (continued) 5.the protection current can be calculated as follows: in case p1[6]/pon, p1[7]/charge, vbat3, p2[3]/adc1 is input, iprotxxx_max = (vext - 2.55)/(500+rext) rext is an external resistor which is needed if the external voltage vext exceeds the 2.8v. (a lower protection current value of e.g. 100 ua is recommended in case power saving is important) in case p1[6]/pon, p1[7]/charge , p2[3]/adc1 is output, iprotxxx_max = (vddio - 2.55)/(500) table 2. operating conditions 1 1.within the specified limits, a lif e time of 10 years is guaranteed. parameter description conditions min typ max units vbat1 battery supply vo ltage vbat1-avs 2.0 5.0 v vbat2 battery supply vo ltage vbat2-avs 2.8 5.0 v vdd digital core supply voltage vdd-vss note 2 2.full operating mode; the differences between avd, vdd may never be more than 300mv; during a short period of time e.g. during power up more t han 300mv difference is allo wed. analog performance is only guaranteed from 1.75-1.98v 1.75 1.8 1.98 v avd analog core supply voltage avd-avs note 2 1.75 1.8 1.98 v avd2 analog core supply voltage avd2-avs note 2 1.75 1.8 1.98 v vddrf analog xtal and rfclk supply voltage vddrf-vssrf note 2 1.75 1.8 1.98 v vddiof digital i/o supply voltage vddio-vss for devices with flash 2.5 2.65 2.8 v vddio digital i/o supply voltage vddio-vss for devices without flash 1.75 3.3 v vdcs voltage on dc_sense pin 2.0 v vpon voltage on pon all states 3 2.8 v vcharge voltage on charge all states 3 2.8 v vbat3 voltage on vbat3 note 3 2.8 v vadc1 voltage on adc1 note 3 2.8 v vprot_mic voltage on pins micn, cidp/n if protec- tion enabled note 4 0.4 1.4 v iprotpon current through protection circuit of pon pin. note 3 0.5 ma iprotcharge current through protection circuit of charge pin. note 3 0.5 ma iprotvbat3 current through protection circuit of vbat3/ringing pin. note 3 0.5 ma iprotadc1 current through protection circuit of adc1 pin. note 3 0.5 ma vldo1_ctrl voltage on ldo1_ctrl 5.0 v vldo2_ctrl maximum voltage on ldo2_ctrl 5.0 v fpll_range pll operating range 28 48 mhz ta ambient temperature note 5 -10 60 c
revision 1.0 (confidential) 5 sc14428 5.0 product stat us definitions 6.0 national semiconductor b.v reserves the right to make changes without notice to any products herein to improve reliability, function or design. national does not assume any liability arising out of the applic ation or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the right of others. 3.the protection current can be calculated as follows: in case p1[6]/pon, p1[7]/charge, vbat3, p2[3]/adc1 is input, iprotxxx_max = (vext - 2.55)/(500+rext) rext is an external resistor which is needed if the external voltage vext exceeds the 2.8v. (a lower protection current value of e.g. 100 ua is recommended in case power saving is important) in case p1[6]/pon, p1[7 ]/charge , p2[3]/adc1 is output, ip rotxxx_max = (vddio - 2.55)/(500) 4.for pads with the protection circuit enabled, the protection current must be limited with external source resistor rext if the input voltage exceeds 0.4v resp 1. 4v. rext can be calculated as follows: rext >(vext-1.4)/iprotxxx). 5.within this temperature range full operation is guaranteed.upto +70 degrees celsius analog perfor- mance is not guaranteed. datasheet status product status definition advance information formative or in design this dat a sheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production this data s heet contains preliminary data. supplementa- ry data will be published at a later date. national semi- conductor corporation reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. no identification noted full production this data sheet contains final sp ecifications. national semiconductor corporation reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. obsolete not in production this data sheet contains specifications on a product that has been discontinued by national semiconductor cor- poration. the datasheet is printed for reference informa- tion only.
life support policy national?s products are not authorized fo r use as critical components in life support devices or systems without the express writte n approval of the president and general counsel of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to per- form, when properly used in accordance with instructions for use provided in the labeling, can be reasonably ex- pected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failu re to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and nati onal reserves the right at any time without notice to change said circuitry and specifications. www.national.com sc14428 baseband processor for fp & pp dect and wdct national semiconductor americas customer support center email: new.feedback@nsc.com tel: 1-800-272-9959 national semiconductor europecustomer support center fax: +49 (0) 180-530 85 86 email: europe.support@nsc.com deutsch tel: +49 (0) 69 9508 6208 english tel: +44 (0) 870 24 0 2171 francais tel: +33 (0) 1 41 91 8790 national semiconductor japan customer support center fax: 81-3-5639-7507 email: jpn.feedback@nsc.com tel: 81-3-5639-7560 national semiconductor asia pacific customer support center email: ap.support@nsc.com 7.0 package information inches (millimeters) unless otherwise noted figure 2. 80 pins pqfp. ns package number: vje80a
|
